ネットワークエンジニア

【東京／北海道／海外】Test Chip Design Engineer

Rapidus株式会社［人材紹介求人］

正社員

北海道

掲載開始日:2026/09/17 更新日:2026/09/18

仕事内容

Key Responsibilities

As a Test Chip Design Engineer， your responsibilities will include:

- Test Chip Physical Design and PPA Analysis:

- Backend (BE) Implementation and Related Flow Development: Drive the full backend implementation flow， from chip-level planning and PG (Power/Ground) network design to floorplan， place， CTS (Clock Tree Synthesis)， route， power analysis (PDNA sign-off)， and comprehensive physical verification.

- Design Methodology and EDA Tool Utility Development: Develop and enhance design methodologies and associated EDA tool utilities specifically for backend implementation. This includes creating solutions for challenges arising from new process technologies and developing utilities to support our customers effectively.

- Technology Benchmark: Conduct detailed technology benchmarking to thoroughly understand and evaluate the PPA characteristics of new process technologies.

- Collaborate closely with process development teams， circuit design teams， and EDA vendors to define and implement robust design flows.

- Analyze and debug complex physical design issues， including timing， power， and physical verification failures.

- Contribute to the continuous improvement of design processes and methodologies.

- Document design specifications， methodologies， and results clearly and concisely.

【変更の範囲】
無し

募集要項

雇用形態: 正社員

年収・給与: 年収 400万円～ 1500万円

休日・休暇: 仕事内容参照

勤務地: 仕事内容参照

【変更の範囲】
無し

契約期間: 契約期間の定め：無し

求める経験・スキル: 【必須条件】

Required Skills & Experience :

- Bachelor’s degree or higher in Electrical Engineering， Electronics Engineering， or a related field.

- 5+ years of hands-on experience in digital backend IC design， with a strong focus on physical design and sign-off.

- Proven expertise in the full physical design flow: floorplanning， power grid design， placement， clock tree synthesis (CTS)， routing， and physical verification (DRC/LVS/Antenna).

- Solid experience with power analysis (PDNA sign-off) and static timing analysis (STA).

- Proficiency with industry-standard EDA tools for physical design (e.g.， Cadence Innovus， Synopsys Fusion Compiler， PrimeTime， RedHawk， Calibre).

- Experience in scripting languages (e.g.， Tcl， Python， Perl) for design automation and flow development.

- Strong understanding of advanced CMOS process technologies and their impact on physical design.

- Excellent analytical and problem-solving skills， with a keen eye for detail.

- Business-level English proficiency， capable of technical discussions with international engineers.

- English communication skills.

【歓迎条件】

職種分類: 技術系（ソフトウェア、ネットワーク）＞ネットワーク設計・構築（LAN・Web系）

事業内容: 半導体素子、集積回路等の電子部品の研究、開発、設計、製造及び販売

環境に配慮した省エネルギーの半導体及び半導体製造技術の研究、開発

半導体産業を担う人材の育成・開発

【日本における次世代半導体プロジェクトの体制】

次世代半導体（Beyond 2nm）の短TAT量産基盤体制の構築実現に向け、先端設計、先端装置・素材の要素技術に係るオープンな研究開発拠点【［日本版NSTC（LSTC）※］※Leading-edge Semiconductor Technology Center】を設立。将来の量産体制の立上げを見据えた量産製造拠点として、Rapidus株式会社を立ち上げることになりました。

【出資企業】

キオクシア、ソニーグループ、ソフトバンク、デンソー、トヨタ自動車、NEC、NTT、三菱UFJ銀行

リモートワーク: 未選択

エージェント情報

社名: 株式会社マイナビ